M8020A J-BERT High-Performance BERT
Key Features & Specifications
- Data rates up to 8.5/ 16 Gb/s for pattern generator and error detector
- Up to four 16 Gb/s BERT channels in a 5-slot AXIe chassis. Expandable to 32 Gb/s with M8061A multiplexer
- Integrated and calibrated jitter injection: RJ, PJ1, PJ2, SJ, BUJ, sinusoidal interference(common-mode and differential-mode), SSC (triangular and arbitrary, residual)
- 8- tap de-emphasis (positive and negative) up to 20 dB
- Integrated and adjustable ISI for loss emulation
- Interactive link training for PCI Express
- Built-in clock data recovery and equalization
- All modules and options are upgradeable
The high-performance Keysight J-BERT M8020A enables fast, accurate receiver characterization of single- and multi-lane devices running up to 16 or 32 Gb/s.
With today’s highest level of integration, the M8020A streamlines your test setup. In addition, automated in situ calibration of signal conditions ensures accurate and repeatable measurements. And, through interactive link training, it can behave like your DUT’s link partner. All in all, the J-BERT M8020A will accelerate insight into your design.
R&D and test engineers who characterize, verify compliance of chips, devices, boards and systems with serial I/O ports up to 16 Gb/s and 32 Gb/s. The M8020A can be used to test popular serial bus standards, such as: PCI Express®, USB, MIPI M-PHYTM, SATA/SAS, DisplayPort, SD UHS-II, Fibre Channel, memory buses, backplanes, repeaters, active optical cables, Thunderbolt, 10 GbE, 100 GbE (optical and electrical), SFP+, CFP2/4 transceivers, CEI.